Introduction to the Special Issue on Computer Arithmetic

intensive numerical simulations use floating-point arithmetic operations, and elementary functions such as logarithm or cosine. Gaining speed and accuracy is tantamount in these applications; cryptographic applications use totally different calculations–but it is still a matter of arithmetic!–, to allow one to efficiently play with elliptic curves, integer lattices, and similar discrete structures. The major goal is not always speed. Some critical applications require very accurate results, certified bounds, fault-tolerance, or sometimes formally proven algorithms. Embedded computing often requires very low power consumption. As a consequence, computer arithmeticians must design a wide variety of algorithms and (hardware or software) implementations, to address these different issues. This special issue of IEEE Transactions on Computers follows the 22nd and 23rd editions of the ARITH conferences, held in July 2015 in Lyon, France and in July 2016 in Santa Clara, California, USA. ARITH (the IEEE Symposium on Computer Arithmetic) is the premier international conference in computer arithmetic. However, this special issue is not a collection of papers presented during these conferences, as they have already been published in the proceedings. The articles presented here are the result of a rigorous selection from more than 30 submitted manuscripts in response to an open call for papers. Authors from 19 countries submitted papers. It is the first time in years that a special section was so successful to require a full special monthly issue to host all the papers. This special issue is the result of a really international and collective effort, and has been made possible thanks to the submitted contributions and to the work of 63 reviewers who wrote 85 reviews: the vast majority of submissions received 3 reviews, only 4 of them received either 2 or 4 reviews. The reviewers did great work and always made pertinent suggestions for improvement: all papers that were not immediately rejected underwent a significant revision. The result was the acceptance of 11 papers. Only 10 of these papers are to be found in this special issue: it was decided that the paper by F. Johansson, entitled Arb: Efficient Arbitrary-Precision Midpoint-Radius Interval Arithmetic deserved to be highlighted. As a consequence, it has both been presented as an invited talk at Arith 24 (July 2017, London, UK), and simultaneously published in the August 2017 edition of this journal (Vol. 66, Issue 8, pp. 1281–1292). In this issue, the readerwill discover the following papers. Floating-point decimal arithmetic is important (indeed, it is frequently mandatory) in financial applications. Besides addition, multiplication is the key operation in these applications. The paper entitled “High Performance Parallel DecimalMultipliers using Hybrid BCDCodes”, by Xiaoping Cui, Wenwen Dong, Weiqiang Liu, Earl Swartzlander, and Fabrizio Lombardi, shows a collection of techniques which combined in a novel way produce efficient decimalmultipliers. In lattice-based cryptography, encrypted texts are represented as points near the points of a Euclidean lattice in veryhigh dimension. They are decryptedusing a “round-off” algorithm. The paper “Arithmetical Improvement of the RoundOff for Cryptosystems in High-Dimensional Lattices” by Paulo Martins, Julien Eynard, Jean-Claude Bajard and Leonel Sousa presents interesting refinements that make it possible to reduce the decryption complexity. The authors obtain excellent performance on recent processors. Implementing fast arithmetic libraries on parallel architectures is a key element for cryptanalysis tools such as the elliptic curve method (ECM). The paper ”Fast Modular Arithmetic on the Kalray MPPA-256 Processor for an Energy-Efficient Implementation of ECM” by J er emie Detrey, Masahiro Ishii, Pierrick Gaudry, Atsuo Inomata, and Kazutoshi Fujikawa presents a highly optimized software support for modular arithmetic on a many-core processor with 256 cores and moduli up to 512 bits, with better performance-energy trade-offs compared to the best stateof-the-art solutions. J. Hormigo and J. Villalba are with University of Malaga, M alaga 29016, Spain. E-mail: {fjhormigo, jvillalba}@uma.es. J.-M. Muller is with CNRS, Laboratoire LIP, Universit e de Lyon, Lyon, France. E-mail: [email protected]. S. Oberman is with NVIDIA, Santa Clara, California 95050. E-mail: [email protected]. N. Revol is with INRIA, Laboratoire LIP, Universit e de Lyon, Lyon, France. E-mail: [email protected]. A. Tisserand is with CNRS, Laboratoire Lab-STICC, Lorient 56100, France. E-mail: [email protected].